Power amplifiers are widely used for example in radio base stations and user equipments in wireless communication systems. Power amplifiers typically amplify an input signal of high frequency into an output signal ready for radio transmission. High efficiency is generally desirable for power amplifier design to reduce the amount of power consumed.
The maximum output power from an amplifier chip, for example a Monolithic Microwave Integrated Circuit (MMIC) or Radio Frequency Integrated Circuit (RFIC), is limited by several factors. For example, there is a maximum safe temperature that limits the average power dissipation and there are voltage and current limitations on the transistors that limit the maximum or peak output power.
Generally, a Radio Frequency (RF) power amplifier can be driven in a so called backed off operation. This means that the power amplifier is operated at a certain level, e.g. expressed as a number of decibels (dBs), under its maximum output power. Backed off operation may also refer to that an instantaneous output power is relatively low. When discussing operation of a power amplifier, the term “transition point” is generally used, which means that at a certain amplitude point, i.e. the transition point, some significant changes occur in the power amplifier, for example operating mode, number of active sub-amplifiers etc. In some amplifiers such as Doherty type, the transition points are also high-efficiency points in an efficiency curve.
To achieve higher output power one can combine power from several chips. Many well-known RF power combination techniques with different properties are available, for example paralleling, Wilkinson combiners, hybrids or directional couplers, bridge coupling, radial combiners and spatial combiners.
The pure combination techniques have a property that the efficiency curve over input signal amplitude has the same shape as the efficiency curve of the employed chips or subsystems since the individual chips are just combined. Therefore, for efficient operation at backed off operations all combined chips or modules need to have the same shape of the efficiency curve.
Another class of combination networks, e.g. networks in Doherty type amplifier disclosed in “A new high efficiency power amplifier for modulated waves,” Proc. IRE, vol. 24, no. 9, pp. 1163-1182, September 1936, and Chireix type power amplifier disclosed in “High power outphasing modulation”, Proc. IRE, vol. 23, no. 2, pp. 1370-1392, November 1935, provide specific interactions between transistor outputs to increase efficiency at lower input signal amplitudes. The interactions are such that they allow some RF output currents to be kept very low while operating at low output amplitudes, while some RF output voltages are instead allowed to increase. The lowered RF output currents means that, for the same output power, less DC current is used in the chips, thus efficiency is increased.
A problem with using Doherty/Chireix-type combination/interaction networks is that the structures and transistor size relations are generally different depending on the efficiency requirements at backed off operations. The bandwidth, which is usually not very large even in the best case, also changes with the structure and backed off efficiency requirements. Optimal efficiency curves usually calls for many different transistor sizes.
For Doherty/Chireix-type combination/interaction networks, the selection of combination methods for chips in the individual high-power transistors is very limited. In essence only pure paralleling, Wilkinson and 180 degrees paralleling is used. For combining the outputs of several complete Doherty/Chireix-type amplifiers, a full range of combination method is available, but sometimes large phase variations between amplifiers may require extra means of adjustment. Further, the bandwidth is also generally lower and/or the ripple on the output signal is higher.
New kind of amplifiers with very large bandwidths, low ripple, and high efficiency over wide input signal amplitude ranges have emerged and have been implemented on chips, e.g. the amplifiers disclosed in patent applications PCT/SE2015/050529 and PCT/SE2015/051134 filed by the present applicant. When using them at higher powers than that can be provided by a single chip, power combination must also be used. The pure combination methods have the problem mentioned above, that is all chips or modules must have good efficiency over entire input signal amplitude range. If good efficiency at backed off operation is required, it will not be improved by the combination process. Each module or integrated amplifier of the new kind would then have to have good efficiency at backed off operations in order for the combined system to have that property. This can be difficult or inconvenient for a number of reasons. For example, there will typically be a very large difference between the highest and lowest impedance level for on-chip transmission lines used in the modules or integrated amplifiers. The total length of transmission line, which increases with bandwidth, may also be larger than what is practical on a single chip.